x86 mce: Small fix for polling/CMCI race conditions.
authorKeir Fraser <keir.fraser@citrix.com>
Mon, 6 Apr 2009 12:46:11 +0000 (13:46 +0100)
committerKeir Fraser <keir.fraser@citrix.com>
Mon, 6 Apr 2009 12:46:11 +0000 (13:46 +0100)
commit3e15c37e68862b9d8f3a9f0085fab2d596e19e49
treeb06fd3e07fb8c63717607b66378654d1ce6ce70e
parentc806877d1b3992a9a75e4aa7604911d048891410
x86 mce: Small fix for polling/CMCI race conditions.

When CMCI happens very quickly, polling/CMCI processing path might
cross. For Intel CPUs which support CMCI, if the error bank has CMCI
capability, we'll disable poll on this bank.

Signed-off-by: Liping Ke <liping.ke@intel.com>
Signed-off-by: Yunhong Jiang<yunhong.jiang@intel.com>
xen/arch/x86/cpu/mcheck/mce.c
xen/arch/x86/cpu/mcheck/mce.h
xen/arch/x86/cpu/mcheck/mce_intel.c
xen/arch/x86/cpu/mcheck/non-fatal.c